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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Feature * 2.6V to 5.5V Supply Voltage Operating Range. * 1.2MHz Fixed Switching Frequency. * Current-Mode PWM Step-Up Regulator Description
The AT1731A DC-DC converter supply a compact and small power supply solution to provide the regulated voltages required by thin film transistor Main High-Power Output up to 15V (TFT) LCD display. A built-in power sequence Typical 1% Accuracy control. Built-In N-MOS, Rds(on)0.25(Typ.) The main step-up DC-DC converter is a Current-Limit Comparator * Negative Charge-Pump Output Voltage Down high-Frequency 1.2 MHz current-mode PWM regulator with a built-in 0.25N-MOS that allows the to -30 V. use of ultra-small inductors and ceramic capacitor to * Positive Charge-Pump Output Voltage Up to generate an externally set output voltage up to 15V. It 30 V. * Internal Power-On Sequencing , Soft-Start. provides fast transient response to pulsed loads while * Thermal Protection , Short Circuit Protection. operating with efficiencies over 85%. * 1uA Shutdown Current. The two built-in charge-pump regulators are used to * 1.5mA Quiescent Current. generate the TFT gate-on and gate-off supplies and * 16-pin TSSOP Package. can adjust gate-on and gate-off output voltage with external resistive divider between gate-off/on output Application voltage and ground. * TFT-LCD Notebook Display * TFT-LCD Desktop Monitor Panels. AT1731A is available in TSSOP- 16 package. * Car Navigation Systems.
Block Diagram
/SHDN REF SCP GND Vin
VDDN SWN FBN
Negative Charge-Pump Block
Reference Voltage
SoftStart Short-Circuit Protection
Under-Voltage Lockout Thermal Protection
Logic Control Block Positive Charge-Pump Block
LX
VDDP SWP FBP
Main Step-Up Converter Block
PGND FB COMP
SS
Aimtron reserves the right without notice to change this circuitry and specifications.
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Pin Configurations
VDDP VDDN LX Vin COMP FB SHDN REF
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9
PGND SWP SWN FBN SCP FBP SS GND
Ordering Information
Part Number AT1731AP AT1731AP_GRE Package TSSOP-16 TSSOP-16 , Green Marking Date Code , Date code with one bottom line
: Date Code *For more marking information, contact our sales representative directly
Pin Description
Pin N0. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol I / O VDDP VDDN LX Vin COMP FB /SHDN REF GND SS FBP SCP FBN SWN SWP PGND P P I P O I I O P I I I I O O P Description Positive Charge-Pump Driver Supply Voltage. Bypass to power ground with 0.1uF capacitor. Negative Charge-Pump Driver Supply Voltage. Bypass to power ground with 0.1uF capacitor. Main Step-up Regulator N-MOS Drain. Place output diode and inductor. Input voltage pin of the device .Vin may range from 2.6V to 5.5V Compensation pin for the main step-up converter. A series RC is connected to this pin. Main Step-Up Regulator Feedback Input. Connect a resistive divider from main output to FB to analog ground. Active-low shutdown control input. Pull SHDN low to force the controller into shutdown. If unused, connect SHDN to Vin for normal operation. Internal Reference Output. External load capability up to 50uA. Analog Ground. Soft-start input. The capacitor connected to this pin to sets the current-limited start time. Positive Charge-Pump Regulator Feedback Input. Connect a resistive divider from the positive charge-pump output to FBP to analog ground. Short Circuit Protection. Negative Charge-Pump Regulator Feedback Input. Connect a resistive divider from the negative charge-pump output to FBN to the reference. Negative Charge-Pump Driver Output. Output high level is VDDN and low level is PGND. Positive Charge-Pump Driver Output. Output high level is VDDP and low level is PGND. Power Ground.
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Absolute Maximum Ratings *1
Parameter Vin , SHDN , SS Voltage LX , SWP , SWN Voltage COMP, REF, FB, FBN, FBP voltage Quiescent Current Continuous power dissipation (TSSOP-16,Ta=+70OC) Junction Temperature Lead Temperature (Soldering 10 sec) Storage Temperature HBM ESD Susceptibility *2 MM Rated Value +6 +18 Vin + 0.3 2.5 650 150 260 -40~150 2 200 unit V V V mA mW KV V
1. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Device are ESD sensitive. Handling precaution recommended. The Human Body model is a 100pF capacitor discharged through a 1.5K resistor into each pin.
Recommended Operation Conditions
Parameter Power supply voltage Operating temperature Symbol Vcc Top Min. 2.6 -30 Values Typ. +25 Max. 5.5 +85 Unit V
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Electrical Characteristics
(Vin=3.0V, SHDN=Vin, VDDP=VDDN=10V, Ta=+25, unless otherwise noted)
Parameter Input operating voltage Input under-voltage threshold Vin UVLO hysteresis Vin Quiescent Current Vin Shutdown Current VDDP Quiescent Current VDDP Shutdown Current VDDN Quiescent Current VDDN Shutdown Current Main Step-Up Converter Main Output Voltage Range Feedback Regulation voltage FB Input Bias Current Operating Frequency Oscillator Maximum Duty Cycle Load Regulation Line Regulation Trans-conductance LX Switch On-Resistance LX Leakage Current LX Current Limit Maximum RMS LX Current Current Soft-Start Reset switch resistance Short- circuit Capacitor charge current Negative Charge-Pump VDDN Input Supply Range Operating Frequency FBN Feedback Regulation Voltage FBN Input Bias Current P-ch On-Resistance N-ch On-Resistance Maximum RMS SWN Current Positive Charge-Pump VDDP Input Supply Range Operating Frequency FBP Feedback Regulation Voltage FBP Input Bias Current P-ch On-Resistance
Symbol Test Condition Vin VUVLO Vin Rising Iin ISHDN IVDDP IVDDN VMAIN VFB IFB fOSC VFB=VFBP=1.23V, VFBN= - 0.2V SHDN=GND VFBP=1.5V SHDN=GND, VDDP=15V VFBN= - 0.2V SHDN=GND, VDDN=15V
Min. 2.6 2.45
Typ. 2.5 120 1 1 0.5 1 0.5 1
Max Units 5.5 V 2.55 V mV 1.5 mA 10 uA 0.8 mA 10 uA 0.8 mA 10 uA 15 V 1.24 V 50 nA 1.3 MHz 90 % % %/V us 0.5 20 2.5 uA A A uA 15 uA V Hz mV nA K mA V Hz 1.24 +50 10 V nA
Ta=+25 VFB=1.23V Ta=+25 0 mAVin 1.21 -50 1.1 80
1.23 1.2 85 0.2 0.1 317 0.25 0.1 2.2 1.87 2 100
RLX-DS(ON ILX=300mA
)
ILX ILIM Iss RSS
VLX=15V Vin=3.3V
2.0
VDDN fCHN VFBN IFBN VFBN=0V RPCH-DS
(ON)
1.0
Vin 0.5 x fOSC -50 -50 5 2 20 50 0
+50 +50 10 4
RNCH-DS VFBN=+50mV VFBN=-50mV (ON)
VDDP fCHP VFBP IFBP VFBP=1.23V RPCH-DS(
Vin 0.5 x fOSC 1.21 -50 5 1.23
15
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
ON)
N-ch On-Resistance Maximum RMS SWP Current Reference Reference Voltage Reference Under-voltage Threshold Logic Signals SHDN input low voltage SHDN input high voltage SHDN input current Thermal Shutdown
ON)
RNCH-DS( VFBP=1.2V VFBP=1.24V
2 20 30
4
K mA V V V V uA
VREF
-2uA 1.21 0.9
1.23 1.06
1.24 1.16 0.9
0.4V hysteresis 2.1 ISHDN 0.01 160
1
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
Typical Operating Characteristics
Load-Transient Response Vin=3.3V, Vmain=10V Main Boost Step-Up waveform with Load
CH1:VMAIN, CH3:ILX, CH4:IMAIN IMAIN=200mA to 2mA Power-Up Sequence
CH1:SHDN, Ch2:VMAIN, CH3:ILX, CH4:IMAIN IMAIN=300mA Power-Up Sequence
CH1: VMAIN, Ch2: VPOS, CH3: SHDN, CH4:VNEG IMAIN=300mA,INEG=20mA,IPOS=20mA
CH1:VMAIN, CH2: Soft-Start, CH3: VPOS, Ch4: VNEG IMAIN=300mA,INEG=20mA,IPOS=20mA
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
Ripple Waveform
CH1:VMAIN, CH2:VPOS, CH3:VNEG, IMAIN=300mA, INEG=20mA,IPOS=20mA
EFFICIENCY vs. LOAD CURRENT (BOOST CONVERTER AND CHARGE PUMPS) 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 3 7 20 40 60 Imain (mA) 80 Vin=5.0V Vin=3.3V Vin=2.7V 100 300
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
MAIN STEP-UP CONVERTER EFFICIENCY vs. LOAD CURRENT (BOOST ONLY) 95 90 85 EFFICIENCY (%) 80 75 70 65 60 55 50 1 3 7 20 40 60 80 100 300 Vin=5.0V Vin=3.3V Vin=2.7V
IMAIN (mA)
SWITCHING FREQUENCY vs. INPUT VOLTAGE 1.25 1.24 1.23 1.22 1.21 1.2 1.19 1.18 2.5 2.8 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V)
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SWITCHING FREQUENCY (MHz)
AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
REFERENCE VOLTAGE vs. REFERENCE LOAD CURRENT 1.23 1.229 1.228 VREF (V) 1.227 1.226 1.225 1.224 1.223 1.222 0 5 10 15 20 25 30 35 40 45 50 IREF (uA)
REFERENCE VOLTAGE vs. TEMPERATURE 1.233 1.232 1.231 1.23 VREF (V) 1.229 1.228 1.227 1.226 1.225 1.224 1.223 -20 -10 0 25 50 85 TEMPERATURE (oC)
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
SWITCHING FREQUENCY vs. TEMPERATURE SWITCHING FREQUENCY (MHz 1.3 1.25 1.2 1.15 1.1 1.05 -20 -10 0 25
o
50
85
TEMPERATURE ( C)
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Typical Application Circuit
Vpos=22V/20mA Vmain 800K
SWP FBP
JP1
Vmain=13V/300mA
0
Option
10uF
0.1uF 0.1uF
47uF
47K
0.47uF 0.1uF
454K
LX
SS
33nF
0.1uF
AT1731A SCP
VDDP
4.7uH
VDDN
AIMTRON
SHDN
FBN
REF
COMP
Vin
SWN
0.22uF
47K
0.1uF
0.22uF
270K
18pF
22uF
Vin
Vneg=-7V/20mA
Figure 1. Standard Application Circuit 7F, No.9,PARK AVENUE. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C. Tel: 886-3-563-0878 Fax: 886-3-563-0879 WWW: http://www.aimtron.com.tw 2/8/2006 REV:1.1 Email: service@aimtron.com.tw 11
1uF
470pF
50K
GND
PGND
FB
100pF
D
47K
Vpos
AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Function Description The AT1731A is a multiple-output DC-DC converter IC which is designed primarily for use in thin-film transistor (TFT) liquid crystal display (LCD) applications. It features a PWM step-up converter operating with a fixed switching frequency of 1.2 MHz and uses internal N-MOS to provide maximum efficiency . The output voltage of the main step-up converter can be set from Vin to 15V with external resistive divider. A pair of charge-pump independently regulate a positive output VDDP and a negative output VDDN for TFT gate-on and gate-off supplies. AT1731A also consists of a precision 1.23V reference that sources up to 50uA, logic shutdown , current-limited , soft-start, power-up sequencing , thermal shutdown and active low. Main Boost converter The boost converter operates in fast transient response , current-mode PWM and a constant frequency of 1.2 MHz , allowing the use of smaller external inductor and output capacitors. Depending on duty cycle of each switching cycle can regulate output voltage.
Vin
FB
L Vin LX Control and Driver NMOS logic Vmain
SCP
Soft-Start
Undervoltage lockout Thermal Protection
OSC
Gm
Current Limit Current sense Short Circuit Protection FB
R1
Slope Compansation
PGND
R2 Gm REF GND 1.23V COMP C10
Figure 2 Main Step-Up Converter block Diagram
Figure 2 shows main step-up converter block diagram. On the rising edge of the internal clock , the control and driver logic block sets internal flip-flop when the output voltage is too low, which turns on the N-MOS . The external inductor current ramps up linearly , storing energy in a magnetic filed. Once peak current of inductor over trans-conductance output level , the N-MOS turns off, the flip-flop resets, and external schottky diode turns on . This
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel forces the current through the inductor to ramp back down , transferring the energy stored in the magnetic field to the output capacitor and load. To add higher flexibility to the selection of external component values, the device uses external loop compensation. Negative Charge-Pump Regulator Negative charge-pump contains internal P-channel and N-channel MOSFETs to perform the power transfer. The internal MOSFETs switch at a constant 600kHz (0.5x fOSC). The charge-pump inverts the supply voltage (VDDN) and provides a regulated negative output voltage. Figure 3 shows charge-pump block diagram. During the first half-cycle, the P-channel MOSFET turns on and flying capacitor CCPN charges to VDDN minus a diode drop. During the second half-cycle, the P-channel MOSFET turns off, and the N-channel MOSFET turns on, level shifting CCPN. This connects CCPN in parallel with the reservoir capacitor CNEG. If the voltage across CNEG minus a diode drop is lower than the voltage across CCPN, charge flows from CCPN to CNEG until the diode turns off. The amount of charge transferred to the output is controlled by the variable N-channel on-resistance. Positive Charge-Pump Regulator Positive charge-pump also contains internal P-channel and N-channel MOSFETs to perform the power transfer. The internal MOSFETs switch at a constant 600kHz (0.5x fOSC). The charge-pump inverts the doubles supply voltage (VDDP) and provides a regulated positive output voltage. During the first half-cycle, the N-channel MOSFET turns on and flying capacitor CCPP charges to VDDP minus a diode drop. During the second half-cycle, the N-channel MOSFET turns off, and the P-channel MOSFET turns on, level shifting CCPP by VDDP volts. This connects CCPP in series with the reservoir capacitor CPOS. If the voltage across CPOS plus a diode drop is lower than the level shifted flying capacitor voltage (VCPP+VDDP), charge flows from CCPP to CPOS until the diode turns off. The amount of charge transferred to the output is controlled by the variable N-channel on-resistance.
Vmain Cout VDDP Cout
V DDN C CPN
Driver Driver Switch Block
V DDP
SWN
SWP
CCPP
R3
VNEG C NEG
R10 FBN FBP CPOS
VPOS
R11
1.23V
R4 V POS =(1+R3/R4)x VREF VREF =1.23V
VREF
1.23V
VNEG = -(R10/R11)xVREF VREF =1.23V
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
Figure 3 Charge-Pump Block Diagram
Shutdown The AT1731A shuts down to reduce the supply current to 1uA when SHDN is low. In this mode, the internal reference , error amplifier , comparators, and biasing circuitry turn off while the N-channel MOSFET is turned off. The boost converter's output is connected to Vin normally. Do not leave SHDN pin floating. A logic-level transition on SHDN clears the fault latch. Power-Up Sequencing The AT1731A goes through start-up sequence after power-up or exiting shutdown. First, the reference power-up, then the main DC-DC step-up converter powers up with soft-start enable. Once the main DC-DC step-up converter reaches regulation , the negative charge pump turns on. When the negative charge pump output voltage reaches approximately 90% of its nominal value (VFBN<110mV) , then the positive charge pump starts up. Finally, when the positive output voltage reaches 100% of its nominal value (VFBP>1.1V) .The power-up sequence is completed, see figure 4.
Vin Shotdown signal
0V Nominal Regulator Value Nominal Regulator 90% 0V
Vmain
Step-up Vout Positive Charge-Pump Vout
0V Nominal Regulator 100% 0V
Negative charge-Pump Vout
Figure 4 Power Sequence
Soft-Start Soft-start allows a gradual increase of the internal current-limit level for the main step-up converter during power-up to reduce input surge currents. As the internal 2uA current source charges the external soft-start capacitor, the peak N-MOS current is limited by the voltage on the capacitor. For the dual charge pumps , soft-start is achieved by in-turn controlling the
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel rising rate of output voltage. Short-Circuit Protection If feedback voltage of the main regulator falls below 0.8V, positive charge-pump falls below 1.1V and negative charge-pump falls below 130mV , the built-in constant current will charge external capacitor CSCP . If VSCP reaches 0.8V ,the ready pin goes high impedance and all outputs shut down.; however , the reference remains active. When short- circuit problem is to eliminate, toggle shutdown or cycle the input voltage to clear the fault latch . Voltage Reference The voltage at REF is nominally 1.23V. The reference can source up to 50uA with good regulation. Connect a 0.22uF bypass capacitor between REF and GND. Thermal-Overload Protection Thermal-overload protection limits total power dissipation in the AT1731A. When the junction temperature exceeds Tj=160 , a thermal sensor activates the thermal protection, which shuts down the IC, allowing the IC to cool. Once the device cools down by 15 , IC will automatically recover normal operation. For continuous operation , do not exceed the absolute maximum junction-temperature rating of Tj=150 . Power dissipation consideration The AT1731A maximum power dissipation depends on the thermal resistance of the IC package and circuit board, the temperature difference between the die junction and ambient air, and the rate of any airflow. The power dissipation in the device depends on the operating conditions of each regulator. The step-up converter dissipates power across the internal N-MOS as the controller ramps up the inductor current. In continuous condition, the power dissipated internally can be approximated by : x VMAIN 2 1 Vin x D 2 I ) ] x RDS (ON ) x D PMAIN -boost = [( MAIN )+ ( Vin 12 f OSC x L where IMAIN : It includes the primary load current and the input supply current for the charge-pumps. The charge-pumps provide regulated output voltages by dissipating power in the low-side N-MOS, so they could be modeled as linear regulators followed by unregulated charge-pumps. Therefore, their power dissipation is similar to a linear regulator :
PNEG = I NEG x [(VDDN - 2 x VDIODE ) x N - V NEG -OUT ] PPOS = I POS x [(VDDP - 2 x VDIODE ) x N - V POS -OUT ]
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Where N : It is the number of charge-pump stages. VDIODE : diodes' forward voltage To find the total power dissipated in the device, the power dissipated by each regulator and the buffer must be added together :
Ptotal = PMAIN -boost + PNEG + P POS
The maximum allowed power dissipation is around 650 mW (16-pin TSSOP) (T j ( MAX ) - T A ) PMAX = JB+ BA Where : Tj - TA : It is the temperature difference between the IC's junction and the surrounding air. JB : the thermal resistance of the package to the board BA : the thermal resistance from the PCB to the surrounding air.
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
Applications Information External components of main boost converter can be designed by performing simple calculations. It need to follow regulation by the output voltage and the maximum load current, as well as maximum and minimum input voltages. Begin by selecting an inductor value. Once L is know, choose the diode and capacitors. Boost inductor Inductor selection depends on input voltage, output voltage , maximum current , switching frequency and availability of inductor values. The following boost circuit equations are useful in choosing the inductor values based on the application. They allow the trading of peak current and inductor value while allowing for consideration of component availability and cost. The peak inductor current is given by:
I Lpeak = I LAVG + I LAVG = I MAIN 1- D
I L 2
where: IL is the inductor peak-to-peak current ripple and is decided by: V D I L = in x L f OSC D is the MOSFET turn on ratio and is decided by: V -V in D= O VO fOSC is the switching frequency. The inductor should be chosen to be able to handle this current and inductor saturation current rating should be greater than IPEAK.
Diode selection The output diode has average current of IMAIN, and peak current the same as the inductor's peak current and a voltage rating at least 1.5 times the main output voltage. Schottky diode is recommended and it should be able to handle those current. Feedback Resistor Network An external resistor divider is required to divide the output voltage down to the nominal reference voltage. Current drawn by the resistor network should be limited to maintain the overall converter efficiency . The maximum value of the resistor network is limited by the
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network in the order of 200k is recommended. The boost converter output voltage is determined by the following relationship:
R V MAIN = V REF x 1 + 1 R2
where VREF =1.23V as specified.
Output Capacitor The AT1731A is specially compensated to be stable with capacitors which have a worst- case minimum value of 10uF at the particular VMAIN being set. Output ripple voltage requirements also determine the minimum value and type of capacitors. Output ripple voltage consists of two components the voltage drop caused by the switching current through the ESR of the output capacitor and the charging and discharging of the output capacitor: V - Vin I MAIN V RIPPLE = I LPEAK x ESR + MAIN x VMAIN C OUT x f OSC For low ESR ceramic capacitors, the output ripple is dominated by the charging or discharging of the output capacitor. Compensation The Main step-up loop can be compensated by adjusting the external components connected to the COMP pin. The COMP pin is connected to the output of the internal trans-conductance error amplifier. The compensation capacitor adjusts the low frequency gain , and the series resistor value adjusts the high frequency gain. The following formula calculates at what frequency the resistor increases the high frequency gain. 1 fZ = 2 x x C C x RC If the device operates over the entire input voltage range from 2.7V to 5.5V, a larger compensation capacitor up to 18pF is recommended. For a good load transient where no oscillation should occur, 50 Kis recommended for RC resistor. Positive and Negative Charge Pump The AT1731 contains two independent charge pump. The regulation of both the negative and positive charge pumps is generated by the internal comparator that senses the output voltage and compares it with and internal reference. The switching frequency of the charge pumps is set to 0.5xfOSC. The pumps use pulse width modulation to adjust the pump period, depending on the load present.
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AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel
Vpos triple output
VDDP
C DL
Vmain Cout
C CPP VDDP C CPP
SWP
V DDN CCPN
Driver
SWN
DL
C POS
VDDP Vpos triple output
Driver Switch Block
V NEG C NEG
R3 R10 R11 FBN FBP
C OUT
1.23V
R4
VREF
1.23V
Negative and Positive charge pump function diagram Negative Charge Pump Design Consideration For a single stage charge pump, the maximum VNEG output is determined by the following equation: 1 V NEG ( MAX ) I NEG x 2 x ( RSWNn ( ON ) + RSWNP (ON ) ) + 2 x VDIODE - I NEG x 0.5 x f OSC x C CPN
- I NEG x
1 0.5 x f OSC x C NEG
- VDDN
where: RSWNN(ON) and RSWNP(ON) resistance values depend on the VDDN voltage levels.
Positive Charge Pump Design consideration For two stage charge pumps, the maximum VPOS output is determined by the following equation:
VPOS ( MAX ) 2 x VDDP - I POS x2 x ( RSWPN (ON ) + RSWPP(ON ) ) - 2 x VDIODE - I POS x I POS x 1 0.5 x f OSC x C POS + VDDP - (2 x VDIODE + I POS x 1 0.5 x f OSC x CCPP 1 0.5 x f OSC x CCPP 1 0.5 x f OSC x COUT - )
+ I POS x
where: RSWPP(ON) and RSWPN(ON) resistance values depend on the VDDP voltage levels.
7F, No.9,PARK AVENUE. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C. Tel: 886-3-563-0878 Fax: 886-3-563-0879 WWW: http://www.aimtron.com.tw 2/8/2006 REV:1.1 Email: service@aimtron.com.tw 19
AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel PCB layout guidelines Careful printed circuit layout is extremely important to avoid causing parasitical capacitance and line inductance. The following layout guidelines are recommended to achieve optimum performance. * Please the boost converter diode and inductor close to the LX pin and no via. * Please ceramic bypass capacitors near the charge-pump input pin. * Locate all feedback resistive dividers as close to their respective feedback pins as possible. * Separate GND and PGND areas connected at only one point under the IC. * Use wide traces and trace length is short as possible.
7F, No.9,PARK AVENUE. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C. Tel: 886-3-563-0878 Fax: 886-3-563-0879 WWW: http://www.aimtron.com.tw 2/8/2006 REV:1.1 Email: service@aimtron.com.tw 20
AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Package Outline TSSOP-16Pin
Unit: mm
7F, No.9,PARK AVENUE. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C. Tel: 886-3-563-0878 Fax: 886-3-563-0879 WWW: http://www.aimtron.com.tw 2/8/2006 REV:1.1 Email: service@aimtron.com.tw 21
AT1731A
Preliminary Product Information DC-DC Power IC for TFT Panel Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly Large Body Small Body Pkg. thickness Pkg. thickness <2.5mm or Pkg. 2.5mm or Pkg. 3 volume 350mm3 volume <350mm 3C/second max.
Average ramp-up rate (TL to TP) Preheat -Temperature Min(Tsmin) -Temperature Max (Tsmax) -Time (min to max)(ts) Tsmax to TL -Ramp-up Rate Time maintained above: -Temperature (TL) -Time (tL) Peak Temperature(TP) Time within 5C of actual Peak Temperature (tP) Ramp-down Rate Time 25C to Peak Temperature
Pb-Free Assembly Large Body Small Body Pkg. thickness Pkg. thickness 2.5mm or Pkg. 2.5mm or Pkg. volume 350mm3 volume 350mm3 3C/second max.
100C 150C 60-120 seconds
150C 200C 60-180 seconds 3C/second max.
183C 60-150 seconds 225+0/-5C 10-30 seconds 240+0/-5C 10-30 seconds
217C 60-150 seconds 245+0/-5C 10-30 seconds 250+0/-5C 20-40 seconds
6C/second max. 6 minutes max.
3C/second max. 8 minutes max.
*All temperatures refer to topside of the package, measured on the package body surface.
7F, No.9,PARK AVENUE. II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C. Tel: 886-3-563-0878 Fax: 886-3-563-0879 WWW: http://www.aimtron.com.tw 2/8/2006 REV:1.1 Email: service@aimtron.com.tw 22

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